龙8老虎机pt,龙8国际pt官方网站: LatticeECP2/M

Redefine the value / cost equation

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龙8老虎机pt,龙8国际pt官方网站

Redefining the FPGA application space – With up to 95 K LUTs and up to 5.3 Mbit block and Distributed RAM the LatticeECP2 and LatticeECP2M families integrate capabilities previously only found on higher cost FPGAs.

High speed SERDES with PCS – High jitter tolerant, low transmission SERDES with PCS blocks can be configured to support an array of popular data protocols including PCI Express, Ethernet (1 GbE and SGMII), OBSAI and CPRI.

Performance without the power drain – Using just 0.35 W static power, you’d be forgiven for thinking that the LatticeECP2/M families couldn’t support up to 840 Mbps LVDS IO, DDR1/2 at 533 Mbps, and SPI4.2 at 750 Mbps – but they can.

Features

  • Embedded SERDES supports data rates up to 3.125 Gbps (LatticeECP2M only)
  • Up to 42 sysDSP™ blocks for high performance multiply and accumulate
  • 55 Kbits to 5308 Kbits sysMEM™ Embedded Block RAM (EBR)
  • sysCLOCK Analog PLLs and DLLs enable clock multiply, divide, phase & delay adjust
  • Available in TQFP, PQFP and fpBGA, packages

Jump to

Family Table

LatticeECP2 (including "S-Series") Device Selection Guide

Parameters ECP2-6 ECP2-12 ECP2-20 ECP2-35 ECP2-50 ECP2-70
LUTs (K) 6 12 21 32 48 68
EBR SRAM Blocks 3 12 15 18 21 56
EBR SRAM (Kbits) 55 221 276 332 387 1032
Distributed RAM (Kbits) 12 24 42 64 96 136
18 x 18 Multipliers 12 24 28 32 72 88
DLL + PLL 2 + 2 2 + 2 2 + 2 2 + 2 4 + 2 6 + 2
DDR Support DDR2 533, DDR 400
Boot Flash External External External External External External
Dual Boot Yes Yes Yes Yes Yes Yes
Bit-stream Encryption SE only SE only SE only SE only SE only SE only
Core Vcc 1.2 V 1.2 V 1.2 V 1.2 V 1.2 V 1.2 V
Temp C Yes Yes Yes Yes Yes Yes
Temp I Yes Yes Yes Yes Yes Yes
1.0 mm Spacing I/O Count / SERDES
  ECP2-6 ECP2-12 ECP2-20 ECP2-35 ECP2-50 ECP2-70
144-pin TQFP (20 x 20 mm) 90 93
208-pin PQFP (28 x 28 mm) 131 131
256-ball fpBGA (17 x 17 mm) 190 193 193
484-ball fpBGA (23 x 23 mm) 297 331 331 339
672-ball fpBGA (27 x 27 mm) 402 450 500 500
900-ball fpBGA (31 x 31 mm) 583

LatticeECP2M (including "S-Series") Device Selection Guide

Parameters ECP2M-20 ECP2M-35 ECP2M-50 ECP2M-70 ECP2M-100
LUTs (K) 19 34 48 67 95
EBR SRAM Blocks 66 114 225 246 288
EBR SRAM (Kbits) 1217 2101 4147 4534 5308
Distributed RAM (Kbits) 41 71 101 145 202
18 x 18 Multipliers 24 32 88 96 168
3.2 Gbps SERDES Channels 4 4 8 16 16
PLL + DLL 8 + 2 8 + 2 8 + 2 8 + 2 8 + 2
DDR Support DDR2 533, DDR 400
Boot Flash External External External External External
Dual Boot Yes Yes Yes Yes Yes
Bit-stream Encryption SE only SE only SE only SE only SE only
Core Vcc 1.2 V 1.2 V 1.2 V 1.2 V 1.2 V
Temp C Yes Yes Yes Yes Yes
Temp I Yes Yes Yes Yes Yes
1.0 mm Spacing I/O Count / SERDES
  ECP2M-20 ECP2M-35 ECP2M-50 ECP2M-70 ECP2M-100
256-ball fpBGA (17 x 17 mm) 140 / 4 140/4
484-ball fpBGA (23 x 23 mm) 304 / 4 303 / 4 270 / 4
672-ball fpBGA (27 x 27 mm) 410 / 4 372 / 8
900-ball fpBGA (31 x 31 mm) 410 / 8
416 / 16
416 / 16
1152-ball fpBGA (35 x 35 mm) 436 / 16 520 / 16

Design Resources

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Application Notes

Learn how to get the most from our line-up of FPGAs / development boards

Software

Complete Design Flows, High Ease of Use

Development Kits & Boards

Our development boards & kits help streamline your design process

Programming Hardware

Take the strain out of in-system programming & in-circuit reconfiguration with our programming hardware

Documentation

To subscribe, or modify your subscription, to Document Notifications please login to your Lattice account

Quick Reference
Technical Resources
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
Advanced Security Encryption Key Programming Guide
TN1215 1.5 1/30/2016 PDF 4.7 MB
Dual and Mulitple Boot Feature
TN1216 1.6 10/30/2015 PDF 3.9 MB
Electrical Recommendations for Lattice SERDES
TN1114 2.9 3/25/2014 PDF 1.8 MB
High-Speed PCB Design Considerations
TN1033 06.1 5/2/2011 PDF 795.1 KB
LatticeECP2/M Density Migration (Implementation Files)
For use with Technical Note - "TN1160 - LatticeECP2/M Density Migration Technical Note"
TN1160 9/1/2007 ZIP 21.5 KB
LatticeECP2/M Density Migration Technical Note
Also download the implementation files for TN1160.
TN1160 1.0 8/1/2007 PDF 122.4 KB
LatticeECP2/M Hardware Checklist Technical Note
TN1162 1.2 10/8/2013 PDF 431.9 KB
LatticeECP2/M High-Speed I/O Interface
TN1105 1.9 10/8/2013 PDF 4.6 MB
LatticeECP2/M Memory Usage Guide
TN1104 2.1 10/8/2013 PDF 4.1 MB
LatticeECP2/M Pin Assignment Recommendations
TN1159 1.1 8/18/2009 PDF 69.9 KB
LatticeECP2/M Soft Error Detection (SED) Usage Guide
TN1113 2.2 10/8/2013 PDF 1012.3 KB
LatticeECP2/M S-Series Configuration Encryption Usage Guide
TN1109 1.6 10/8/2013 PDF 1.5 MB
LatticeECP2/M sysCLOCK PLL/DLL Design and Usage Guide
TN1103 2.2 10/8/2013 PDF 4.6 MB
LatticeECP2/M sysCONFIG Usage Guide
TN1108 2.5 10/8/2013 PDF 2.7 MB
LatticeECP2/M sysDSP Usage Guide
TN1107 1.4 10/8/2013 PDF 3 MB
LatticeECP2/M sysIO Usage Guide
TN1102 2.0 10/8/2013 PDF 2.2 MB
LatticeECP2M Broadcom XAUI 10 Gbps Physical Layer Interoperability Over CX-4
TN1188 01.0 11/2/2009 PDF 565.7 KB
LatticeECP2M Marvell XAUI 10 Gbps Physical Layer Interoperability
TN1191 1.0 11/18/2008 PDF 434.4 KB
LatticeECP2M PRBS SERDES Demo User's Guide
TN1153 01.5 6/28/2010 PDF 730.8 KB
LatticeECP2M SERDES/PCS Usage Guide
TN1124 3.6 10/8/2013 PDF 7.4 MB
LatticeECP2M/Marvell Gigabit Ethernet Physical Layer Interoperability Technical Note
TN1163 01.0 7/1/2007 PDF 1.2 MB
LatticeECP2M/Marvell Serial-GMII (SGMII) Physical Layer Interoperability
TN1133 01.1 2/13/2012 PDF 3.5 MB
LatticeECP3 and LatticeECP2M High-Speed Backplane Measurements
TN1149 1.5 10/8/2013 PDF 3.8 MB
Minimizing System Interruption During Configuration Using TransFR Technology
TN1087 3.7 10/30/2015 PDF 2.4 MB
Parallel Flash Programming and FPGA Configuration
Also download the implementation files for AN8077.
AN8077 1.3 3/1/2015 PDF 2.4 MB
Parallel Flash Programming and FPGA Configuration - Source Code
For use with Application Note - AN8077
AN8077 1.3 1/4/2013 RAR 1.4 MB
PCI Express SIG Compliance Overview for Lattice Semiconductor FPGAs
TN1166 01.0 8/1/2007 PDF 759.5 KB
Power Decoupling and Bypass Filtering for Programmable Devices
TN1068 1.0 5/1/2004 PDF 31.4 KB
Power Estimation and Management for LatticeECP2/M Devices Technical Note
TN1106 1.5 10/8/2013 PDF 491.1 KB
Thermal Management
3.0 3/24/2017 PDF 1021.3 KB
Transmission of High-Speed Serial Signals over Common Cable Media
TN1066 01.8 2/13/2012 PDF 840.1 KB
LatticeECP2/M Family Data Sheet
DS1006 4.1 10/1/2013 PDF 25.9 MB
LatticeECP2/M Family Data Sheet (Japanese Language Version)
DS1006 03.9 1/30/2011 PDF 6.8 MB
Package Diagrams
5.5 11/20/2017 PDF 13.8 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
LatticeECP2/M Family Data Sheet
DS1006 4.1 10/1/2013 PDF 25.9 MB
LatticeECP2/M Family Data Sheet (Japanese Language Version)
DS1006 03.9 1/30/2011 PDF 6.8 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Electrical Recommendations for Lattice SERDES (Chinese Language Version)
TN1114C 02.8 10/12/2012 PDF 2 MB
High-Speed PCB Design Considerations (Chinese Language Version)
TN1033C 06.1 5/23/2011 PDF 434.6 KB
LatticeECP2/M High-Speed I/O Interface (Japanese Language Version)
TN1105 01.5 1/18/2009 PDF 1.6 MB
LatticeECP2/M Memory Usage Guide Technical Note (Japanese Language Version)
TN1104 01.8 1/15/2009 PDF 1.5 MB
LatticeECP2/M S-Series Configuration Encryption Usage Guide (Japanese Language Version)
TN1109 01.2 2/18/2009 PDF 391.1 KB
LatticeECP2/M sysCLOCK PLL/DLL Design and Usage Guide (Japanese Language Version)
TN1103 01.6 1/19/2009 PDF 1.4 MB
LatticeECP2/M sysCONFIG Usage Guide (Japanese Language Version)
TN1108 02.1 1/15/2009 PDF 652.1 KB
LatticeECP2/M sysDSP Usage Guide (Japanese Language Version)
TN1107 01.1 9/1/2006 PDF 1 MB
LatticeECP2/M sysIO Usage Guide (Chinese Language Version)
TN1102C 01.7 4/28/2010 PDF 341.1 KB
LatticeECP2/M sysIO Usage Guide (Japanese Language Version)
TN1102 01.6 1/19/2009 PDF 586.4 KB
LatticeECP2M SERDES/PCS Usage Guide (Japanese)
TN1124 02.9 2/2/2009 PDF 2.5 MB
Advanced Security Encryption Key Programming Guide
TN1215 1.5 1/30/2016 PDF 4.7 MB
Dual and Mulitple Boot Feature
TN1216 1.6 10/30/2015 PDF 3.9 MB
Electrical Recommendations for Lattice SERDES
TN1114 2.9 3/25/2014 PDF 1.8 MB
High-Speed PCB Design Considerations
TN1033 06.1 5/2/2011 PDF 795.1 KB
LatticeECP2/M Density Migration (Implementation Files)
For use with Technical Note - "TN1160 - LatticeECP2/M Density Migration Technical Note"
TN1160 9/1/2007 ZIP 21.5 KB
LatticeECP2/M Density Migration Technical Note
Also download the implementation files for TN1160.
TN1160 1.0 8/1/2007 PDF 122.4 KB
LatticeECP2/M Hardware Checklist Technical Note
TN1162 1.2 10/8/2013 PDF 431.9 KB
LatticeECP2/M High-Speed I/O Interface
TN1105 1.9 10/8/2013 PDF 4.6 MB
LatticeECP2/M Memory Usage Guide
TN1104 2.1 10/8/2013 PDF 4.1 MB
LatticeECP2/M Pin Assignment Recommendations
TN1159 1.1 8/18/2009 PDF 69.9 KB
LatticeECP2/M Soft Error Detection (SED) Usage Guide
TN1113 2.2 10/8/2013 PDF 1012.3 KB
LatticeECP2/M S-Series Configuration Encryption Usage Guide
TN1109 1.6 10/8/2013 PDF 1.5 MB
LatticeECP2/M sysCLOCK PLL/DLL Design and Usage Guide
TN1103 2.2 10/8/2013 PDF 4.6 MB
LatticeECP2/M sysCONFIG Usage Guide
TN1108 2.5 10/8/2013 PDF 2.7 MB
LatticeECP2/M sysDSP Usage Guide
TN1107 1.4 10/8/2013 PDF 3 MB
LatticeECP2/M sysIO Usage Guide
TN1102 2.0 10/8/2013 PDF 2.2 MB
LatticeECP2M Broadcom XAUI 10 Gbps Physical Layer Interoperability Over CX-4
TN1188 01.0 11/2/2009 PDF 565.7 KB
LatticeECP2M Marvell XAUI 10 Gbps Physical Layer Interoperability
TN1191 1.0 11/18/2008 PDF 434.4 KB
LatticeECP2M PRBS SERDES Demo User's Guide
TN1153 01.5 6/28/2010 PDF 730.8 KB
LatticeECP2M SERDES/PCS Usage Guide
TN1124 3.6 10/8/2013 PDF 7.4 MB
LatticeECP2M/Marvell Gigabit Ethernet Physical Layer Interoperability Technical Note
TN1163 01.0 7/1/2007 PDF 1.2 MB
LatticeECP2M/Marvell Serial-GMII (SGMII) Physical Layer Interoperability
TN1133 01.1 2/13/2012 PDF 3.5 MB
LatticeECP3 and LatticeECP2M High-Speed Backplane Measurements
TN1149 1.5 10/8/2013 PDF 3.8 MB
Minimizing System Interruption During Configuration Using TransFR Technology
TN1087 3.7 10/30/2015 PDF 2.4 MB
Parallel Flash Programming and FPGA Configuration
Also download the implementation files for AN8077.
AN8077 1.3 3/1/2015 PDF 2.4 MB
Parallel Flash Programming and FPGA Configuration - Source Code
For use with Application Note - AN8077
AN8077 1.3 1/4/2013 RAR 1.4 MB
PCI Express SIG Compliance Overview for Lattice Semiconductor FPGAs
TN1166 01.0 8/1/2007 PDF 759.5 KB
Power Decoupling and Bypass Filtering for Programmable Devices
TN1068 1.0 5/1/2004 PDF 31.4 KB
Power Estimation and Management for LatticeECP2/M Devices Technical Note
TN1106 1.5 10/8/2013 PDF 491.1 KB
Thermal Management
3.0 3/24/2017 PDF 1021.3 KB
Transmission of High-Speed Serial Signals over Common Cable Media
TN1066 01.8 2/13/2012 PDF 840.1 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Package Diagrams
5.5 11/20/2017 PDF 13.8 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Lattice PCI Express x4 Scatter-Gather DMA Demo Verilog Source Code User's Guide
UG06 01.3 12/14/2010 PDF 144.3 KB
Lattice SMPTE SDI Demo User's Guide
Explains how to use the SMPTE SDI Demo - available for download separately, along with the LatticeECP2M SMPTE SDI Evaluation Board and the Multi-Rate Serial Digital Interface (SDI) PHY Layer IP core.
UG02 01.1 7/11/2008 PDF 1.4 MB
LatticeECP2 Advanced Evaluation Board User's Guide
Describes the features and functions of the LatticeECP2-Advanced Evaluation Board. Includes schematics.
EB23 01.6 1/13/2009 PDF 2 MB
LatticeECP2 Standard Evaluation Board User's Guide
Describes the features and functions of the LatticeECP2 Standard Evaluation Board, including schematics.
5/1/2007 PDF 1.2 MB
LatticeECP2M PCI Express Solutions Evaluation Board User's Guide
Describes the features and operation of the LatticeECP2M PCIe solutions board - includes schematics. This board is included with the LatticeECP2M PCI Express Development Kit.
EB33 01.0 9/4/2008 PDF 2.4 MB
LatticeECP2M PCI Express x4 Evaluation Board User's Guide - Rev A PCB
Describes the features and functions of the LatticeECP2M PCI Express x4 Evaluation Board, including schematics.This manual is for Rev A boards only.
EB22 01.6 2/8/2008 PDF 1.1 MB
LatticeECP2M PCI Express x4 Evaluation Board User's Guide - Rev B PCB
Describes the features and functions of the LatticeECP2M PCI Express x4 Evaluation Board, including schematics. This manual is for Rev B boards only.
EB34 01.2 1/13/2009 PDF 1.2 MB
LatticeECP2M SERDES Evaluation Board User's Guide
Describes the features and functions of the LatticeECP2M SERDES Evaluation Board. Includes schematics.
EB25 01.7 5/7/2010 PDF 1.4 MB
PCI Express Basic Demo Verilog Source Code User's Guide
UG15 01.3 12/14/2010 PDF 132 KB
PCI Express Throughput Demo Verilog Source Code User's Guide
UG07 01.4 12/14/2010 PDF 139.6 KB
PCI IP Core User's Guide
PCI Core User Guide for LatticeSC, LatticeECP3, LatticeECP2/M, LatticeECP/EC, LatticeXP, Mach XO, and MachXO2
IPUG18 9.2 11/8/2010 PDF 4.6 MB
Programming Cable User's Guide
Describes the features and recommended usage guidelines of Lattice ispDOWNLOAD Cables.
UG48 25 11/14/2016 PDF 1.3 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
HDLC Controller for FPGAs - Documentation
RD1038 01.1 9/4/2008 PDF 1.1 MB
HDLC Controller for FPGAs - Source Code
RD1038 1.0 9/4/2008 ZIP 1.2 MB
IrDA Fast Transmitter - Source Code
RD1135 1.0 10/12/2012 ZIP 414.4 KB
RGMII to GMII Bridge - Source Code
RD1022 2.3 11/18/2016 ZIP 478 KB
RGMII to GMII Bridge Reference Design
Also download the source code below
RD1022 2.3 11/18/2016 PDF 279.7 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
ACN03D-11 Withdrawal of ACN03C-11
Material Set
ANC03D-11 1 4/1/2011 PDF 796.6 KB
Courtesy Notification of Additional Ejector Pin Sites on Select BGA Packages
5/22/2013 PDF 252.9 KB
PCN 02A-15 Affected_OPN_Listing
Discontinuance
3.0 8/12/2015 XLSX 310.4 KB
PCN 02A-15 SnPb and Select Mature Family Discontinuance
1.0 6/18/2015 PDF 316.9 KB
PCN 03B13 Alternate Qualified Assembly Test Site Alternate Qualified Material Sets ASE Taiwan
Assembly Site, Material Set
PCN03B 1.0 11/14/2014 PDF 229.6 KB
PCN 09A-12 Affected Devices
Assembly Site
PCN09A-12 1.0 5/14/2012 XLSX 121 KB
PCN 09A-12 Alternate Qualified Material Set, Assembly Site for Select Lattice Families
PCN09A-12 1.0 5/14/2012 PDF 160.2 KB
PCN 09A-12 Frequently Asked Questions
PCN09A-12 1.0 5/11/2012 PDF 178.9 KB
PCN 09A-12 Material Set Changes
Assembly Site
PCN09A-12 1.0 5/14/2012 XLSX 121 KB
PCN02A-15 Frequently Asked Questions
2.0 6/18/2015 DOCX 60.8 KB
PCN02B-12 Notification of a Revision to the LatticeXP2, LA-LatticeXP2 and LatticeECP2/M Data Sheets
Data Sheet
PCN02B-12 1.0 2/6/2012 PDF 181.6 KB
PCN03A-13 Alternate Qualified Assembly and Material Sets for Select Devices
PCN03A-13 6/28/2013 PDF 202.5 KB
PCN03A-13 Device Characterization Report
PCN03A-13 6/28/2013 PDF 981.3 KB
PCN03A-13 FAQs
PCN03A-13 6/28/2013 PDF 458.3 KB
PCN03A-14 Affected Part Number List
PCN03A-14 1.0 4/4/2014 XLSX 60 KB
PCN03A-14 Characterization Report
PCN03A-14 1.0 4/4/2014 PDF 919.5 KB
PCN03A-14 FAQ
PCN03A-14 1.0 4/4/2014 PDF 452.5 KB
PCN03A-14 Material Set Table
PCN03A-14 1.0 4/4/2014 XLSX 26.9 KB
PCN03B-13 Affected Part Number and Material Sets
PCN03B-13 6/28/2013 XLSX 69 KB
PCN03B-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and/or Alternate Qualified Material Sets for Select Lattice Products
PCN03B-14 1.0 11/21/2014 PDF 229.9 KB
PCN05A-17 Affected Parts List
1.0 10/18/2017 XLSX 14.9 KB
PCN05A-17 Halogen-Free substrate at ASEM
1.2 10/27/2017 PDF 268 KB
PCN06A-14 Affected Device List
PCN06A-14 1.0 10/3/2014 XLSX 45.1 KB
PCN06A-14 Characterization Report
PCN06A-14 1.0 10/3/2014 PDF 563.7 KB
PCN06A-14 Material Set Table
PCN06A-14 1.0 10/3/2014 XLSX 13.7 KB
PCN06B-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and Alternate Qualified Material Sets for Select Lattice Products
PCN06B-14 1.0 11/21/2014 PDF 229.5 KB
PCN06C-11 Withdrawal of PCN06B-11
Material Set
PCN06C-11 1.0 8/1/2011 PDF 838.5 KB
PCN07C-11 Withdrawal of PCN07B-11
Material Set
PCN07C-11 1.0 8/1/2011 PDF 917.9 KB
PCN08A13_AffectedDevices
Other
PCN08A-13 1 9/26/2013 XLSX 78.2 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Lattice OrCAD Capture Schematic Library (OLB)
This file contains a OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.
6.1 11/7/2017 ZIP 1004.4 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Lattice HetNet Solutions Brochure
I0234 1.0 11/12/2013 PDF 2.2 MB
LatticeECP2/M Product Briefs
I0187 7.0 12/26/2012 PDF 2.4 MB
PCI Express Solutions Brochure
I0195 3.0 5/14/2010 PDF 1.8 MB
Product Selector Guide
I0211 14.0 1/22/2018 PDF 9.2 MB
Wireless Solutions Brochure
I0197 3.0 8/14/2012 PDF 2 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
FN1152_FE2
Rev G 2/15/2018 PDF 22.5 KB
FN256_FE2
Rev G 2/7/2018 PDF 29.1 KB
FN484
Rev G 2/12/2018 PDF 29.3 KB
FN672
Rev H 2/7/2018 PDF 29.3 KB
FN900_FE2
Rev G 2/7/2018 PDF 29.1 KB
LatticeECP2/M Product Family Qualification Summary
A 7/1/2009 PDF 392.7 KB
QN_YN208
Rev E 2/7/2018 PDF 28.8 KB
TN_TG144 Cu_wire all
Rev E 2/7/2018 PDF 28.7 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Expanding Applications For Low Cost FPGAs
8/1/2007 PDF 295 KB
FPGA Design Security Issues: Using Lattice FPGAs to Achieve High Design Security
9/1/2007 PDF 259.2 KB
Gen2 Serial RapidIO and Low Cost Low Power FPGAs (Korean Language)
1.0 9/26/2011 PDF 349 KB
Implementing PCI Express Bridging Solutions in an FPGA
1.0 7/1/2010 PDF 970.1 KB
Implementing PCI Express Bridging Solutions in an FPGA (Chinese Language)
1.0 7/1/2010 PDF 1007.1 KB
Interfacing Analog to Digital Converters to FPGAs
1.0 11/7/2007 PDF 202.3 KB
Low Cost Serial Transmission with the LatticeECP2M FPGA
7/1/2007 PDF 250.4 KB
The Challenges of Automotive Vision Systems Design
4/1/2007 PDF 341.5 KB
The FPGA as a Flexible and Low-Cost Digital Solution for Wireless Base Stations
3/1/2007 PDF 384.9 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
[BSDL] LFE2M100E FPBGA1152
1.03 9/10/2012 BSM 129.2 KB
[BSDL] LFE2M100E FPBGA900
1.03 9/10/2012 BSM 115.9 KB
[BSDL] LFE2M20E FPBGA256
1.03 9/10/2012 BSM 52.1 KB
[BSDL] LFE2M20E FPBGA484
1.03 9/10/2012 BSM 68.6 KB
[BSDL] LFE2M35E FPBGA256
1.02 9/10/2012 BSM 60.9 KB
[BSDL] LFE2M35E FPBGA484
1.03 9/10/2012 BSM 77.8 KB
[BSDL] LFE2M35E FPBGA672
1.03 1/26/2016 BSM 89.5 KB
[BSDL] LFE2M50E FPBGA484
1.03 9/10/2012 BSM 80.6 KB
[BSDL] LFE2M50E FPBGA672
1.03 9/10/2012 BSM 93.9 KB
[BSDL] LFE2M50E FPBGA900
1.03 9/10/2012 BSM 102.5 KB
[BSDL] LFE2M70E FPBGA1152
1.03 9/10/2012 BSM 113.9 KB
[BSDL] LFE2M70E FPBGA900
1.03 9/10/2012 BSM 105.6 KB
[BSDL] LFEC2_12E FPBGA256
1.03 9/10/2012 BSM 52 KB
[BSDL] LFEC2_12E FPBGA484
1.03 9/10/2012 BSM 64.5 KB
[BSDL] LFEC2_12E PQFP208
1.01 9/10/2012 BSM 46.6 KB
[BSDL] LFEC2_12E TQFP144
1.01 9/10/2012 BSM 42.2 KB
[BSDL] LFEC2_20E FPBGA256
1.01 9/10/2012 BSM 58 KB
[BSDL] LFEC2_20E FPBGA484
1.01 9/10/2012 BSM 72.6 KB
[BSDL] LFEC2_20E FPBGA672
1.01 9/10/2012 BSM 82.1 KB
[BSDL] LFEC2_20E PQFP208
1.01 9/10/2012 BSM 52.9 KB
[BSDL] LFEC2_35E FPBGA484
1.01 9/10/2012 BSM 79.2 KB
[BSDL] LFEC2_35E FPBGA672
1.01 9/10/2012 BSM 91.5 KB
[BSDL] LFEC2_50E FPBGA484
1.05 9/10/2012 BSM 88.2 KB
[BSDL] LFEC2_50E FPBGA672
1.07 9/10/2012 BSM 103.5 KB
[BSDL] LFEC2_6E FPBGA256
1.01 9/10/2012 BSM 43.7 KB
[BSDL] LFEC2_6E TQFP144
1.01 9/10/2012 BSM 34.5 KB
[BSDL] LFEC2_70E FPBGA672
1.02 9/10/2012 BSM 111.2 KB
[BSDL] LFEC2_70E FPBGA900
1.02 9/10/2012 BSM 122.7 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
ECP2/M Device Family DELPHI Models
1.0 4/9/2009 ZIP 501.6 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
[IBIS] Lattice ECP2
2.2 7/1/2008 33.4 MB
[IBIS] Lattice ECP2M
2.2 7/1/2008 33.4 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Lattice SMPTE SDI Demo Code
This contains all the design files and standard, configured IP block for use with the LatticeECP2M SMPTE SDI Evaluation Board and the Multi-Rate Serial Digital Interface (SDI) PHY Layer IP core. See the User's Guide (available for download separately)
1.1 7/11/2008 ZIP 777.1 KB
LatticeECP2 Standard Evaluation Board Sample Program
Contains a sample program for the LatticeECP2 Standard Evaluation Board. This program is pre-loaded onto new LatticeECP2 Standard boards. See the readme.txt file for details.
5/1/2006 ZIP 37.3 KB
龙8老虎机pt,龙8国际pt官方网站 LatticeECP2M PRBS SERDES Demo
This demo illustrates the SERDES/PCS capabilities of the LatticeECP2M by embedding a simple pseudo-random pattern into an 8b10b encoded PCS payload, then looping back the payload, and checking it for correctness.
3/8/2010 ZIP 706.6 KB


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